Minimize energy consumption of a microcontroller by lowering the speed and voltage of the central processing unit
Getting a central control unit (CPU) into sleep mode can decrease average power consumption of a microcontroller, but there are also techniques to optimize its active mode power consumption. In this tech paper we showcase how to minimize power consumption by applying lower speed and voltage to a CPU of an Atmel ATmega328PB Xplained Mini evaluation board.
System level current and voltage measurements are conducted with Otii, connected at the Atmel ATmega328PB board power supply connectors, as showed in Figure 1 below.
A sample application, created for this specific set of measurements, steps through the CPU clock divisors from 1 to 128 and busy-waits for 1 s at each CPU speed. This is done at three different supply voltages: 3.3, 3.0 and 2.5 V.
In order to estimate energy consumption the following generalized equation can be used:
E = Pt = UIt (1),
where E is Energy (Ws), P is power (W), t is time (s), U is voltage (V), and I is current (A).
As a common practice, a device, or parts of it, is turned off or switched to an available power save mode to keep current low. Voltage is kept close to a nominal value by power supply. CPU cores of modern MCUs can run at different frequencies; at lower frequencies the speed is reduced, less current is drained and lower voltage allowed. Note however, that when switching to lower voltage, you need to first make sure the speed is allowed for this new voltage. Running above allowed speeds for a certain voltage will make the CPU unstable.
Lowering speed and voltage is applicable to any digital system, not only to an MCU. It gives the same effect on a desktop or smartphone multi-core clustered CPU. The Atmel ATmega328PB is used to demonstrate the effect because it is simple. It has one CPU core which is easy to control and its peripherals do not obscure the effect. Hence the current measurements and supply voltages at the Atmel board are effectively the ones for the CPU.
Lowering the speed and the voltage
The screenshot of the recordings is presented in Fig. 2. The green line corresponds to 3.3, the red line to 3.0 and the yellow to 2.5 V CPU voltage. Beginning with the first, highest level, the divisor is set to 1, 2, 4, 8, 16, 32, 64, and 128, respectively.
Tab. 1. The average current (mA) by the CPU clock division factor and voltage.
Tab. 2. The Energy consumption (uWh) by the CPU clock division factor and voltage.
Tab. 3. Differences in the energy consumption (uWh) from nearest higher speed.
Differences shown in Tab. 3 calculated by the following formula:
DN = EN – EN/2, N=2..128 (2),
Where N is clock division factor, EN is its corresponding value from Tab. 2.
Effects on the energy consumption
The following conclusions can be derived from the measurement results:
- Running the CPU at slower frequencies reduced the energy consumption
- Switching between high clock division factors (N=64 etc) gives less incremental improvement compared to switching between low ones (e.g. N=1 to N=2).
- Lowering supply voltage to the board while having the CPU run at the same speed may give better result than slowing down CPU by one step.
In general, for ATmega328PB on the Xplained Mini board it was possible to reduce power consumption by 60% by decreasing both voltage and CPU frequency for busy-waiting CPU.
If the priority in the design of a device is to optimize the energy consumption, the following steps can be recommended to select the CPU running mode:
- Optimize your algorithm for performance, to ensure the least possible CPU speed it requires.
- Select minimal required CPU frequency.
- Find minimal voltage allowed for that frequency.
- Check that other components can run at that voltage.
- Redesign hardware if they can’t run at that voltage
In this tech paper, measurements of energy consumption for different CPU frequencies and supply voltages are presented. For the Atmel ATmega328PB Xplained Mini the reduction of energy consumption is showcased to be up to 60% for lower frequencies and voltages. The trend of the changes is analyzed and general design guidelines related to CPU operation in active mode are also suggested.
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